> Du pratade om att det skulle ta 8-10ms, hela proceduren.
tråden eller någon annan tråd. Men som sagt, *skrivningen* tar ca 2.5 ms.
o.s.v. Så totalt kanske det är den tid du nämner.
Sedan så har jag för mig att det var en annan modell vi tittade på innan, men det
kanske jag minns fel. Tiderna kan variera något mellan modeller.
> Samt att den var beroende av använda respektive tomma byte.
"Tomma" eller "tömma"? Man ja, raderingen tar också tid. Däremot spelar
Jag vet inte om detta är så mycket att "utgå" från, men om det är till hjälp så...
Det som är speciellt är hur "out_buff" allokeras, det är unikt för de nya 16F1xxx.
Koden är skriven så att, efter att main har initierat allt, så körs allting i ISR koden.
"copy_buff_loop" visar en kopiering från flash till RAM, också unikt för 16F1xxx.
"roll_loop" är för att "rulla" texten en pixel innan nästa uppdatering.
Kod: Markera allt
;**********************************************************************
; Enkelt test av CDS 8x64 röd/grön LED matrix.
; För PIC16F1938
;
;**********************************************************************
; *
; Filename: CDS.asm
; Date: 2012-08-04
; File Version: 1.0
;
; Author: Jan-Erik Söderholm
; Company: Jan-Erik Söderholm Consulting AB
;
;**********************************************************************
;
; Files required: P16F1938.INC
;
;**********************************************************************
;
; Använder intosc på 32 Mhz (HFINTOSC + PLL).
;
; ROW SEL 0 : RA0
; ROW SEL 1 : RA1
; ROW SEL 2 : RA2
; ROW EN : RA3
; COL CLK : RB0
; COL DATA LATCH : RB1
; COL EN OUTPUT : RB2
; COL SER DATA : RB3
;**********************************************************************
list p=16f1938 ; list directive to define processor
#include <p16f1938.inc> ; processor specific variable definitions
__CONFIG _CONFIG1, _FOSC_INTOSC & _WDTE_OFF & _PWRTE_OFF & _MCLRE_ON & _CP_OFF & _CPD_OFF & _BOREN_OFF & _CLKOUTEN_ON & _IESO_OFF & _FCMEN_OFF
__CONFIG _CONFIG2, _WRT_OFF & _VCAPEN_OFF & _PLLEN_OFF & _STVREN_OFF & _BORV_19 & _LVP_OFF
;**********************************************************************
errorlevel -302
;
#define ROW_SEL_PORT LATA
#define ROW_EN LATA, 3
#define COL_CLOCK LATB, 0
#define COL_LATCH LATB, 1
#define COL_EN LATB, 2
#define COL_DATA LATB, 3
;
roll_speed equ d'112'
row_init equ d'8'
VAR1 UDATA_SHR
loop_cnt RES 1
ROW_COUNTER res 1
row_tmp res 1
roll_timer res 1
roll_tmp1 res 1
roll_tmp2 res 1
; Allocate display buffer.
; 384 positioner för röd/grön data
LINEAR0 UDATA
out_buff RES d'384'
;**********************************************************************
; RESET VECTOR
;**********************************************************************
RESET_VECT CODE 0x0000 ; processor reset vector
PAGESEL START
GOTO START
nop
nop
;**********************************************************************
; INTERRUPT SERVICE ROUTINE
;**********************************************************************
ISR CODE 0x0004 ; interrupt vector location
; Disable display
banksel lata
bcf row_en
bcf col_en
movlw d'128'
dis_del
decfsz wreg, f
goto dis_del
; Update ROW SEL 0-2 for next row
decf row_counter, f
banksel ROW_SEL_PORT
movf ROW_SEL_PORT, w
andlw b'11111000'
iorwf row_counter, w
movwf ROW_SEL_PORT
; Load next 128 pixel bits
movlw high out_buff
movwf fsr0h
movlw low out_buff
movwf fsr0l
movlw d'128'
movwf loop_cnt
movf row_counter, w ; (7 ... 1)
lslf wreg, f ; (now 14, 12, 10 ... 2, 0)
lslf wreg, f ; (now 28, 24, 20 ... 4, 0)
pixel_loop
bcf COL_DATA
brw ; Add WREG to PC!
; Pixel 0
btfsc indf0, 0
bsf COL_DATA
goto cont_pix_loop
nop
; Pixel 1
btfsc indf0, 1
bsf COL_DATA
goto cont_pix_loop
nop
; Pixel 2
btfsc indf0, 2
bsf COL_DATA
goto cont_pix_loop
nop
; Pixel 3
btfsc indf0, 3
bsf COL_DATA
goto cont_pix_loop
nop
; Pixel 4
btfsc indf0, 4
bsf COL_DATA
goto cont_pix_loop
nop
; Pixel 5
btfsc indf0, 5
bsf COL_DATA
goto cont_pix_loop
nop
; Pixel 6
btfsc indf0, 6
bsf COL_DATA
goto cont_pix_loop
nop
; Pixel 7
btfsc indf0, 7
bsf COL_DATA
goto cont_pix_loop
nop
cont_pix_loop
; Toggle COL_CLOCK
bsf COL_CLOCK
nop
bcf COL_CLOCK
addfsr 0, 1
decfsz loop_cnt, f ; All pixels?
goto pixel_loop ; No, continue.
; Toggle COL_LATCH
bsf COL_LATCH
nop
bcf COL_LATCH
; Roll buffer one pos to left if needed.
decfsz roll_timer, f
goto no_roll
; Rotate 384 byte buffer 2 steps to the left.
; Load FSR0 with start adress of buffer.
movlw high out_buff
movwf fsr0h
movlw low out_buff
movwf fsr0l
; Number of loops.
; 5 bytes are moved each loop, 76x5 = 380.
; 2 bytes are saved for later restore = 382.
; 2 bytes are moved outside of the loop = 384.
movlw d'76'
movwf loop_cnt
; Save the first two positions for later restore.
moviw [fsr0] ; First pos...
movwf roll_tmp1
moviw 1[fsr0] ; Second pos...
movwf roll_tmp2
; Move two positions to get an "even" loop.
moviw 2[fsr0] ; Move FSR0+2 => W
movwi fsr0++ ; Move W => FSR0 and incr FSR0
moviw 2[fsr0]
movwi fsr0++
; Now loop through the rest of the buffer.
; Move 5 bytes each time to save on looping logic.
roll_loop
moviw 2[fsr0]
movwi fsr0++
moviw 2[fsr0]
movwi fsr0++
moviw 2[fsr0]
movwi fsr0++
moviw 2[fsr0]
movwi fsr0++
moviw 2[fsr0]
movwi fsr0++
decfsz loop_cnt, f ; All of buffer?
goto roll_loop ; No, continue.
movf roll_tmp1, w ; Restore the two saved bytes
movwi [fsr0] ; At the end of buffer
movf roll_tmp2, w
movwi 1[fsr0]
movlw roll_speed
movwf roll_timer
; End Roll buffer...
no_roll
; Check row_counter and reset if neeed
movf row_counter, f
btfss status, z
goto cont_1
movlw row_init
movwf row_counter
cont_1
; Re-enable display
banksel lata
bsf row_en
bsf col_en
; End of ISR...
banksel intcon
bcf intcon, tmr0if
RETFIE ; return from interrupt
;**********************************************************************
; MAIN PROGRAM
;**********************************************************************
START
;**********************************************************************
; PLACE USER PROGRAM HERE
;**********************************************************************
banksel ansela
clrf ansela
clrf anselb
banksel trisa
clrf trisa
clrf trisb
banksel lata
clrf lata
clrf latb
banksel lcdcon
bcf lcdcon, lcden
; 32 Mhz...
banksel osccon
bsf osccon, spllen
bsf osccon, ircf3
bsf osccon, ircf2
bsf osccon, ircf1
bcf osccon, ircf0
; Copy buffer data from flash to GPR.
movlw high out_buff
movwf fsr0h
movlw low out_buff
movwf fsr0l
movlw high txt_tab3
movwf fsr1h
movlw low txt_tab3
movwf fsr1l
movlw d'192'
movwf loop_cnt
copy_buff_loop
moviw indf1++
nop
movwi indf0++
moviw indf1++
nop
movwi indf0++
decfsz loop_cnt, f
goto copy_buff_loop
; Initiera row_counter
movlw row_init
movwf row_counter
; Initiera roll_timer
movlw roll_speed
movwf roll_timer
; Initiera Timer0
banksel option_reg
bcf option_reg, ps0
bcf option_reg, ps1
bsf option_reg, ps2
bcf option_reg, psa
bcf option_reg, tmr0cs
banksel intcon
bsf intcon, tmr0ie
; Starta interrupt
banksel intcon
bsf intcon, peie
bsf intcon, gie
;**********************************************************************
end_loop
GOTO end_loop
;
;**********************************************************************
; Text example stored in flash.
txt_sect3 code
txt_tab3 dt h'ff', h'00', h'7E', h'00', h'3C', h'00', h'18', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'61', h'00', h'91', h'00', h'91', h'00', h'91' ; S
dt h'00', h'8E', h'00', h'00'
dt h'00', h'0E', h'00', h'11', h'00', h'11', h'00', h'11' ; o
dt h'00', h'0E', h'00', h'00'
dt h'00', h'0E', h'00', h'11', h'00', h'11', h'00', h'09' ; d
dt h'00', h'FF', h'00', h'00'
dt h'00', h'02', h'00', h'01', h'00', h'21', h'00', h'BE' ; j
dt h'00', h'00', h'00', h'00'
dt h'00', h'06', h'00', h'29', h'00', h'29', h'00', h'29' ; a
dt h'00', h'1F', h'00', h'00'
dt h'00', h'3F', h'00', h'10', h'00', h'20', h'00', h'20' ; n
dt h'00', h'1F', h'00', h'00'
dt h'00', h'00', h'00', h'00', h'00', h'00', h'00', h'00'
dt h'00', h'1e', h'00', h'29', h'00', h'49', h'00', h'89' ; 6
dt h'00', h'86', h'00', h'00'
dt h'00', h'18', h'00', h'28', h'00', h'48', h'00', h'ff' ; 4
dt h'00', h'08', h'00', h'00'
dt h'00', h'11', h'00', h'0a', h'00', h'04', h'00', h'0a' ; x
dt h'00', h'11', h'00', h'00'
dt h'00', h'6e', h'00', h'91', h'00', h'91', h'00', h'91' ; 8
dt h'00', h'6e', h'00', h'00'
dt h'00', h'00', h'00', h'00', h'00', h'00', h'00', h'00'
dt h'00', h'ff', h'00', h'01', h'00', h'01', h'00', h'01' ; L
dt h'00', h'01', h'00', h'00'
dt h'00', h'ff', h'00', h'91', h'00', h'91', h'00', h'91' ; E
dt h'00', h'81', h'00', h'00'
dt h'00', h'ff', h'00', h'81', h'00', h'81', h'00', h'42' ; D
dt h'00', h'3c', h'00', h'00'
dt h'00', h'00', h'00', h'00', h'00', h'00', h'00', h'00'
dt h'00', h'0E', h'00', h'11', h'00', h'11', h'00', h'09' ; d
dt h'00', h'FF', h'00', h'00'
dt h'00', h'0e', h'00', h'15', h'00', h'15', h'00', h'15' ; e
dt h'00', h'0c', h'00', h'00'
dt h'00', h'3f', h'00', h'20', h'00', h'18', h'00', h'20' ; m
dt h'00', h'1f', h'00', h'00'
dt h'00', h'0E', h'00', h'11', h'00', h'11', h'00', h'11' ; o
dt h'00', h'0E', h'00', h'00'
dt h'00', h'00', h'00', h'00', h'00', h'00', h'00', h'00'
dt h'00', h'ff', h'00', h'88', h'00', h'88', h'00', h'88' ; P
dt h'00', h'70', h'00', h'00'
dt h'00', h'81', h'00', h'81', h'00', h'ff', h'00', h'81' ; I
dt h'00', h'81', h'00', h'00'
dt h'00', h'7e', h'00', h'81', h'00', h'81', h'00', h'81' ; C
dt h'00', h'42', h'00', h'00'
dt h'00', h'00', h'00', h'41', h'00', h'ff', h'00', h'01' ; 1
dt h'00', h'00', h'00', h'00'
dt h'00', h'1e', h'00', h'29', h'00', h'49', h'00', h'89' ; 6
dt h'00', h'86', h'00', h'00'
dt h'00', h'ff', h'00', h'90', h'00', h'90', h'00', h'90' ; F
dt h'00', h'80', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
dt h'00', h'00', h'00', h'00'
END